1. Field of the Invention
The invention relates to a arrangement with at least one substrate, at least one electrical component that is disposed on a surface section of the substrate with an electrical contact surface and at least one electrical contact lug with an electrical connection surface for electrical contacting of the contact surface of the component with the connection surface of the contact lug and the contact surface of the component being connected to each other such that at least one area of the contact lug protrudes beyond the contact surface of the component. In addition a method for production of the arrangement is specified.
2. Description of the Related Art
An arrangement of the type described is known from U.S. Pat. No. 5,616,886. The component is an aluminum layer applied to a section of the surface of the substrate. For electrical contacting of the layer composed of aluminum an electrical terminal in the form of a contact lug is employed. A further component named in U.S. Pat. No. 5,616,886 is a power semiconductor chip, for example an IGBT (Insulated Gate Bipolar Transistor). This component is contacted via its surface without the use of bond wires. Details of this process are not specified.
The most widely used technology for contacting of power semiconductor chips with one another is thick wire bonding (see Harmann, G., “Wire Bonding in Microelectronics, Materials, Processes, Reliability and Yield”, Mc Graw Hill 1998). Ultrasound energy is used here to make a permanent connection between the wire made of Al, which typically has a diameter of a few 100 μm and the contact surface, which consists of Al on the chip and Cu on the power module, realized via an intermetallic connection.
As an alternative to bonding further methods such as ThinPak are publicized (see Temple, V., “SPCO's ThinPak Package, an Ideal Block for Power Modules and Power Hybrids”, IMAPS 99 Conference, Chicago 1999). In this case the chip surface is contacted via a solder which is inserted via holes in a ceramic plate.
With MPIPPS (Metal Posts Interconnected Parallel Plate Structures, see Haque S., et al., “An Innovative Technique for Packaging Power Electronic Building Blocks Using Metal Posts Interconnected Parallel Plate Structures”, IEEE Trans Adv. Pckäg., Vol. 22, No. 2 May 1999) the contacts are established by means of soldered copper posts.
Another method for contacting is by using solder bumps in flip chip technology (Liu, X., et al., “Packaging of Integrated Power Electronics Modules Using Flip-Chip Technology”, Applied Power Electronics Conference and Exposition, APEC'2000). This also enables heat to be dissipated more effectively since the power semiconductors can be soldered on the upper and lower side to DCB substrates (DCB stands for Direct Copper Bonding) (see Gillot, C. et al., “A New Packaging Technique for Power Multichip Modules”, IEEE Industry Applications Conference IAS'99, 1999).
A large-area contacting on vapor-deposited Cu leads is presented in (Lu, G.-Q., “3-D, Bond-Wireless Interconnection of Power Devices in Modules Will Cut Resistance, Parasitics and Noise”, PCIM May 2000, pp. 40-68), where the isolation of the conductor tracks is undertaken by means isolator deposited from the vapor phase (CVD-method) (Power Module Overlay Structure).
Contacting by means of a structured film using a gluing or soldering process has been publicized in Krokoszinski, H.-J., Esrom, H., “Film Clip for Power Module Interconnects”, Hybrid Circuits 34 September 1992).